storage/index/utils/util.h
| Line | Branch | Exec | Source |
|---|---|---|---|
| 1 | #pragma once | ||
| 2 | |||
| 3 | #include <cstdlib> | ||
| 4 | #include <stdint.h> | ||
| 5 | |||
| 6 | #define CPU_FREQ_MHZ (1994) // cat /proc/cpuinfo | ||
| 7 | #define CAS(_p, _u, _v) \ | ||
| 8 | (__atomic_compare_exchange_n( \ | ||
| 9 | _p, _u, _v, false, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE)) | ||
| 10 | #define _kCacheLineSize (64) | ||
| 11 | |||
| 12 | inline constexpr uint64_t kWriteLatencyInNS = 10; | ||
| 13 | inline uint64_t clflushCount = 0; | ||
| 14 | |||
| 15 | ✗ | static inline void CPUPause(void) { __asm__ volatile("pause" ::: "memory"); } | |
| 16 | |||
| 17 | 291096 | static inline unsigned long ReadTSC(void) { | |
| 18 | unsigned long var; | ||
| 19 | unsigned int hi, lo; | ||
| 20 | 291096 | asm volatile("rdtsc" : "=a"(lo), "=d"(hi)); | |
| 21 | 291096 | var = ((unsigned long long int)hi << 32) | lo; | |
| 22 | 291096 | return var; | |
| 23 | } | ||
| 24 | |||
| 25 | 270468 | inline void mfence(void) { asm volatile("mfence" ::: "memory"); } | |
| 26 | |||
| 27 | 108082 | inline void clflush(char* data, size_t len) { | |
| 28 | 108082 | volatile char* ptr = (char*)((unsigned long)data & (~(_kCacheLineSize - 1))); | |
| 29 | 108082 | mfence(); | |
| 30 | 253630 | for (; ptr < data + len; ptr += _kCacheLineSize) { | |
| 31 | unsigned long etcs = | ||
| 32 | 145548 | ReadTSC() + (unsigned long)(kWriteLatencyInNS * CPU_FREQ_MHZ / 1000); | |
| 33 | 145548 | asm volatile("clflush %0" : "+m"(*(volatile char*)ptr)); | |
| 34 | 145548 | while (ReadTSC() < etcs) | |
| 35 | ✗ | CPUPause(); | |
| 36 | 145548 | clflushCount++; | |
| 37 | } | ||
| 38 | 108082 | mfence(); | |
| 39 | 108082 | } | |
| 40 |